The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
The ever-shrinking geometry size brings challenges to semiconductor fabrication. For example, semiconductor device fabrication may involve forming one or more layers (e.g., source/drain) through an epitaxial growth process. The epitaxial growth process involves applying heat to the wafer. As geometry sizes shrink, for example down to the 10-nanometer node or smaller nodes, the heat application in the epitaxial growth process may not be adequately uniform for fabrication purposes. In some instances, an edge region of the wafer may not receive sufficient heat. As a result, semiconductor device performance is degraded.
Therefore, although existing methods and devices of heating the wafer in an epitaxial process have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.